Ken follows up part 2 of the myStorm low down, digging deeper into the design choices:
Makeup of myStorm
ARM Cortex M3 Section
- As a non-volatile Flash memory device for holding the FPGA bitfile.
- As a FPGA programmer communicating the bitfile to the FPGA via an SPI interface.
- As a general purpose I/O/ADC slave processor – by way of serial or fast 8-bit parallel interface
- As a system controller for applications where the Raspberry Pi is not present.
Some months ago, through my association with the STM32Duino group, I got to hear about some low cost ARM M3 parts from a vendor in China, apparently binary and pin compatible with the STM32 parts . At first, these appeared to be rip-offs of the STM32F103 series, produced by Chinese vendor Giga Devices. However, further investigation revealed that they were actually a legitimate new design, which employed a neat idea to produce a low cost, volume range of ARM Cortex M3 microcontrollers for the Chinese market. Because Giga Device is a Flash Memory manufacturer, their M3 Cortex parts have up to 3Mbytes of flash “on-chip”. One advantage of the GD series of microcontrollers is that they are available with very large (2MB, 3MB) flash memories – allowing multiple FPGA bitfiles to be stored in the single device. The four user DIP switches B0-B3 can be used to select which bitfile image is loaded – or what mode the myStorm boots up in when power is first applied.
- The 5V tolerant GPIO lines and are brought to “Arduino” style pin header, shield connectors – so that external shields may be fitted.
- 6 Analogue Input Lines AN0 – AN5 with 12 bit resolution brought to shield headers.
- UART (with bootloader facility) TX, RX – jumper linked to the UART output of the Pi Zero – to allow communication and serial bootloading
- Up to 18 digital lines – including I2C and SPI
- USB 2.0 connection for programming, data and power – when the board is used “standalone” without a Raspberry Pi connected
- 8 bit bidirectional bus interface to FPGA and Raspberry Pi with handshaking lines
- SPI bus for programming FPGA from bit file.
- Up to 120MHz clock available using GD32 parts.
- Several microcontroller options available from GD32 or STM32 product range – allows greatest versatility in ROM, RAM & peripherals
- For example – up to 3 differential input 16 bit ADC channels (If STM32F373 optional mcu is fitted in place of STM32F103xx)
Raspberry Pi section
When the Raspberry Pi Zero was released in November 2015, it was heralded with a blaze of publicity as a $5 fully functioning Linux computer. Just add keyboard and display with the O/S stored on a microSD card, therefore including a Standard 2 x 40 Raspberry Pi GPIO header for myStorm was a no-brainer, along with an EEPROM for PI-Hat identity.
- 3 single PMOD connectors (3 x 4 GPIO)
- 5 double PMOD connectors (5 x 8 GPIO)
- 34 pin Boxed Header “Olimex” style 2 x 17 connector
- 2 x 8 header for direct connection to 32 x 32 RGB matrix display, or to a VGA output expansion board shared with 2 double PMODS.
Other Hardware Features
- Efficient dual voltage switching regulator – provides 1.2 volt Vcc for the FPGA plus the 3V3 for FPGA IO, SPI, memory and ARM microcontroller.
- 4 USER dip switches
- 5 USER LEDs 4 connected to FPGA outputs – allowing ‘Traffic Light’ display, plus one connected the ARM microcontroller – for ‘blinky’ or ‘programming’ purposes.
- RESET switch
- BOOT header – caters for the boot requirements of both the STM32 and the GD32 microcontroller.
Keeping the cost down was a primary concern, yet we wanted to make a board that was both genuinely useful and accessible.
To achieve this, Alan came up with a unique strategy:
- Low cost FPGA with open source tool chain
- Low cost ARM Cortex – to act as “system integrator” and glue.
- Optional On board Pi Zero – to host the open source FPGA tools – user supplies this at $5.00 or even add their own existing Raspberry Pi.
Having settled on the ICE40HX4K – as the largest ICE40 available in an LQFP package – and thus capable of being routed on a 2 layer board, we set about identifying the other key components.
Having seen James Bowman’s J1a Forth Processor – a soft core running in an ICE40HX1K part, I wanted to add a fast (10nS) 16 bit wide SRAM – which in a TSSOP-44 package allows parts between 64K and 512K words. With this combination comes the ability to create a number of soft core processors, of which the 16 bit simple processor described in the “Nand to Tetris” course would seem a very suitable candidate.
Other applications include digital instrumentation that require large arrays of fast memory – such as digital oscilloscopes and logic analysers.
The lynchpin in this design is the use of a low cost ARM device, not only to provide stand alone USB communications, storage (in flash) of the FPGA bitfiles, but also provide a series of spi slave ADCs and 5V tolerant GPIO pins and peripherals to augment the FPGA architecture.
We believe that if an FPGA board sells for around $30 then it will attract a fair bit of attention.
This was going to be tricky – so we set ourselves a BOM on a very tight budget of arount $10 based around the principal components – costed in 100 and 1000 off quantities. LOP relates to “Labour, Operations and Profit” – which is the sum our Shenzhen manufacturing Partners will charge us for the pcb assembly and Far East logistics. This is often quoted at about 25% of the total BOM cost.
100 off 1000 off
FPGA $5.56 $5.37
ARM $1.92 $1.00
SRAM $1.69 $1.22
PCB $0.88 $0.49
Connectors $0.50 $0.40
Remainder $0.50 $0.40
Sub Total $10.33 $8.88
LOP $2.58 $2.22
Total $12.91 $11.10
Pi Zero $5.00 $5.00
So in 1000 of quantity, the BOM and manufacturing (LOP = Labour, Operations Profit) comes to a total of around $11, which allows a selling price of about $30.